1. Field of the Invention
The present invention relates to a switching device for an electric circuit, and more specifically relates to a switching device including an insulated-gate field-effect transistor (referred to as IGFET or FET hereinafter) and protective switching means for protecting the same.
2. Description of the Related Art
A typical IGFET has a drain region, a body region (base region), a source region, a drain electrode connected with a drain region, a source electrode connected with the source region and the body region, a gate insulator film covering a surface of the body region exposed between the drain region and the source region, and a gate electrode disposed on the gate insulator film. A source electrode is in ohmic contact with the source region and also in ohmic contact with the body region. Thus there is generated a current path through a channel in the body region between the drain electrode and the source electrode, and another current path through a parasitic diode (a body diode or a inbuilt diode) based on a PN junction between the drain region and the body region. In a case where the IGFET is of a N-channel type, the parasitic diode becomes in an inverse bias state when a potential of the drain electrode is higher than a potential of the source electrode, thus not forming a current path therethrough. However, there may be a case where the potential of the drain electrode is lower than the potential of the source electrode depending on operation of an electric circuit in which the IGFET is used, or misconnection between a power supply (a battery for example) and the electric circuit. In this case, the parasitic diode becomes in a forward bias state, thus causing current flow therethrough. When a current flows via the parasitic diode, a current between the drain and the source cannot be controlled by means of a control voltage between the gate and the source. Further, if a considerable current flows between the drain and the source via the parasitic diode, it gives rise to destruction of the IGFET or the electric circuit.
It is known to couple an external diode (reverse blocking diode) having an inverse polarity (direction) to a polarity (direction) of the parasitic diode in series with the IGFET in order to block a current through the parasitic diode of the IGFET. However, it leads to a power loss to a relatively great extent at the external diode because an identical current to that through the IGFET flows through the external diode. Further, if the external diode is connected in series with the IGFET, control of the current through the IGFET becomes impossible when a potential of the drain electrode is lower than a potential of the source electrode, more specifically when an inverse voltage is applied to the IGFET.
A Japanese Unexamined Patent Publication No. H07-15009 discloses an IGFET of a planar structure in which a source electrode is in Schottky contact with a body region for the purpose of solving the problem raised by an external diode. To have a source electrode being in Schottky contact with a body region as with this case forms a Schottky diode constituted of the source electrode and the body region, thereby the Schottky diode blocking an inverse current.
The IGFET 11 having the Schottky diode built therein has a structure shown in FIG. 3 which has a FET switch Q1 equivalently shown in FIG. 1, first and second PN junction diodes D1 and D2, and the Schottky barrier diode D3. The first PN junction diode D1 has a polarity by which the diode is inversely biased when a potential of a drain electrode D is higher than a potential of a source electrode S, and connected in inverse parallel with the FET switch Q1. The second PN junction diode D2 has an inverse polarity to that of the first PN junction diode D1 and is connected in series with the first PN junction diode D1. The Schottky barrier diode D3 has an inverse polarity to that of the first PN junction diode D1 and is then connected in series with the first PN junction diode D1 and connected in parallel with the second PN junction diode D2. The drain electrode D of the IGFET 11 is connected with a positive terminal 31a of a direct current power supply 31 via a first connection conductor 16, a load 30, and one of the power supply connection conductor 19. The source electrode S is connected with a grounded terminal 31b via a second connection conductor 17 and another of the power supply connection conductor 20.
The gate electrode G of the IGFET 11 is connected with a gate control circuit 32 via a gate resistor 14. Further a bias resistor 15 is connected in between the gate electrode G and the source electrode S. The gate control circuit 32 shown in principle is comprised of a switch 34 and a resistor 35. The switch 34 is constituted of a controllable electronic switch (a transistor for example), one end of which is connected with the gate electrode G of the IGFET 11 via an output conductor 13 and the gate resistor 14 and another end of which is connected with the source electrode S of the IGFET 11. The control terminal of the switch 34 is connected with a control signal input terminal 36 so as to be turned off when the IGFET 11 is turned on and be turned on when the IGFET 11 is turned off. The resistor 35 is connected in between a bias power supply terminal 37 and one end of the switch 34. A bias power circuit 33 connected with the bias power supply terminal 37 is constituted of a direct current bias power supply 38 and a reverse blocking diode 39 and impresses a bias voltage, which can on-drive the IGFET 11, to the gate electrode G via the resistor 35 and the gate resistor 14.
In the meantime, if the positive terminal 31a of the direct current power supply 31 is connected with another of the power supply connection conductor 20 as shown by dotted lines in FIG. 1 and an inverse voltage is impressed to the source electrode S and the drain electrode D so that the source electrode S is made positive and the drain electrode D is made negative, a voltage is impressed to the gate electrode G via the bias resistor 15, thereby reducing a breakdown voltage of the second PN junction diode D2. As a result, the second PN junction diode D2 becomes substantially not functional and thus an inverse directional current is likely to flow through the second PN junction diode D2, thereby giving no benefit by providing the Schottky barrier diode D3. Meanwhile even in a case where the bias resistor 15 is not provided, as a parasitic capacitance exists in between the drain electrode D and the gate electrode G and thus reduction in breakdown voltage of the second PN junction diode D2 occurs, thereby the second PN junction diode D2 becomes substantially not functional.